Research Experience

Research of Low-Cost High-Speed FFT Processor Design

· Propose three techniques to optimize the design of an 8-parallel FFT processor for DC-OFDM systems. They are respectively parallelism with FFT composition, radix factorization and a modified twiddle factor multiplier.

Research of Parallel FIR Digital Filter Design

· Propose new low-cost and area-efficient structures for FIR digital filter, which exchange multipliers with adders by utilizing the coefficient symmetry with new polyphase decomposition methods.